专利名称:Electronic device having a CMOS circuit发明人:Fumiyasu Utsunomiya申请号:US10245413申请日:20020917公开号:US06674311B2公开日:20040106
专利附图:
摘要:A depletion type n-channel MOS transistor (hereinafter referred to as “D-typeNMOS”) as a MOS transistor of a SOI structure is disposed between a plus side powersupply terminal of a CMOS circuit and a plus side terminal of a power supply unit so as toconnect a source thereof to the pulse side power supply terminal of the CMOS circuit, to
connect a drain thereof to the plus side terminal of the power supply unit, and to inputto a gate thereof a voltage such that even if the voltage of the plus side terminal of thepower supply unit exceeds the upper limit of the operation voltage of the CMOS circuit,the source of the D-type NMOS is equal to or lower than the upper limit of the operationvoltage of the CMOS circuit, and the same voltage as the voltage of the plus sideterminal of the power supply means when the voltage of the plus side terminal of thepower supply means is the vicinity of the lower limit of the operation voltage of theCMOS circuit.
申请人:SEIKO INSTRUMENTS INC.
代理机构:Adams & Wilks
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