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MC100EP51DTG资料

来源:二三娱乐
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MC10EP51, MC100EP513.3V / 5V󰀁ECL D Flip−Flopwith Reset and DifferentialClock

Description

The MC10/100EP51 is a differential clock D flip−flop with reset.The device is functionally equivalent to the EL51 and LVEL51devices.

The reset input is an asynchronous, level triggered signal. Dataenters the master portion of the flip−flop when the clock is LOW and istransferred to the slave, and thus the outputs, upon a positive transitionof the clock. The differential clock inputs of the EP51 allow the deviceto be used as a negative edge triggered flip-flop.

The differential input employs clamp circuitry to maintain stabilityunder open input conditions. When left open, the CLK input will bepulled down to VEE and the CLK input will be biased at VCC/2.The 100 Series contains temperature compensation.

Features

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MARKING DIAGRAMS*81SOIC−8D SUFFIXCASE 75118HEP51ALYWG18KEP51ALYWG81TSSOP−8DT SUFFIXCASE 948R8HP51ALYWGG8KP51ALYWGG•350 ps Typical Propagation Delay•Maximum Frequency > 3 GHz Typical

•PECL Mode Operating Range: VCC = 3.0 V to 5.5 V ••••

with VEE = 0 V

NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −5.5 VOpen Input Default StateSafety Clamp on Inputs

Pb−Free Packages are Available

11DFN8MN SUFFIXCASE 506AAHK5S3NM= MC10= MC100= MC10= MC100= Date Code15S MGG41ALYWG= Assembly Location= Wafer Lot= Year= Work Week= Pb−Free Package(Note: Microdot may be in either location)*For additional marking information, refer to Application Note AND8002/D.ORDERING INFORMATION

See detailed ordering and shipping information in the packagedimensions section on page 8 of this data sheet.

© Semiconductor Components Industries, LLC, 2006

November, 2006 − Rev. 6

1

Publication Order Number:

MC10EP51/D

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MC10EP51, MC100EP51

Table 1. PIN DESCRIPTIONRESET

18VCC

PINCLK*, CLK*RD

2DFlip-FlopCLK

36Q7Q

Reset*D*Q, QVCCVEEEPFUNCTIONECL Clock InputsECL Asynchronous ResetECL Data InputECL Data OutputsPositive SupplyNegative SupplyExposed pad must be connectedto a sufficient thermal conduit.Electrically connect to the mostnegative supply or leave floatingopen.CLK45VEE

*Pins will default LOW when left open.

Table 2. TRUTH TABLE

Figure 1. 8−Lead Pinout (Top View) and Logic Diagram

DLHX

RLLH

CLKZZX

QLHL

Z = LOW to HIGH Transition

Table 3. ATTRIBUTES

Characteristics

Internal Input Pulldown ResistorInternal Input Pullup ResistorESD Protection

Human Body Model

Machine Model

Charged Device Model

Pb PkgLevel 1Level 1Level 1

Value75 kWN/A> 2 kV> 200 V> 2 kV

Pb−Free PkgLevel 1Level 3Level 1

Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)

SOIC−8TSSOP−8

DFN8

Flammability RatingTransistor Count

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test1.For additional information, see Application Note AND8003/D.

Oxygen Index: 28 to 34

UL 94 V−0 @ 0.125 in

165 Devices

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MC10EP51, MC100EP51

Table 4. MAXIMUM RATINGS

SymbolVCCVEEVIIoutTATstgqJAqJCqJAqJCqJATsol

Parameter

PECL Mode Power SupplyNECL Mode Power SupplyPECL Mode Input VoltageNECL Mode Input VoltageOutput Current

Operating Temperature RangeStorage Temperature Range

Thermal Resistance (Junction−to−Ambient)Thermal Resistance (Junction−to−Case)Thermal Resistance (Junction−to−Ambient)Thermal Resistance (Junction−to−Case)Thermal Resistance (Junction−to−Ambient)Wave Solder

PbPb−Free

0 lfpm500 lfpmStandard Board0 lfpm500 lfpmStandard Board0 lfpm500 lfpm

SOIC−8SOIC−8SOIC−8TSSOP−8TSSOP−8TSSOP−8DFN8DFN8

Condition 1VEE = 0 VVCC = 0 VVEE = 0 VVCC = 0 VContinuousSurge

VI v VCCVI w VEE

Condition 2

Rating6−66−650100−40 to +85−65 to +150

19013041 to 4418514041 to 4412984265265

UnitVVVVmAmA°C°C°C/W°C/W°C/W°C/W°C/W°C/W°C/W°C/W°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above theRecommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affectdevice reliability.

Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)

−40°C

SymbolIEEVOHVOLVIHVILVIHCMRIIHIIL

Characteristic

Power Supply CurrentOutput HIGH Voltage (Note 3)Output LOW Voltage (Note 3)Input HIGH Voltage (Single−Ended)Input LOW Voltage (Single−Ended)Input HIGH Voltage Common Mode

Range (Differential Configuration) (Note 4)Input HIGH CurrentInput LOW Current

0.5Min2621651365209013652.0

Typ3422901490

Max4424151615241516903.3150

0.5Min2622301430215514302.0

25°CTyp3523551555

Max4524801680248017553.3150

0.5Min2822901490221514902.0

85°CTyp3724151615

Max4725401740254018153.3150

UnitmAmVmVmVmVVmAmA

NOTE:Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limitvalues are applied individually under normal operating conditions and not valid simultaneously.

2.Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.3.All loading with 50 W to VCC − 2.0 V.

4.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differentialinput signal.

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MC10EP51, MC100EP51

Table 6. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)

−40°C

SymbolIEEVOHVOLVIHVILVIHCMRIIHIIL

Characteristic

Power Supply CurrentOutput HIGH Voltage (Note 6)Output LOW Voltage (Note 6)Input HIGH Voltage (Single−Ended)Input LOW Voltage (Single−Ended)Input HIGH Voltage Common Mode Range(Differential Configuration) (Note 7)Input HIGH CurrentInput LOW Current

0.5Min2638653065379030652.0

Typ3439903190

Max4441153315411533905.0150

0.5Min2639303130385531302.0

25°CTyp3540553255

Max4541803380418034555.0150

0.5Min2839903190391531902.0

85°CTyp3741153315

Max4742403440424035155.0150

UnitmAmVmVmVmVVmAmA

NOTE:Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limitvalues are applied individually under normal operating conditions and not valid simultaneously.

5.Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.6.All loading with 50 W to VCC − 2.0 V.

7.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differentialinput signal.

Table 7. 10EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 8)

−40°C

SymbolIEEIEEVOHVOLVIHVILVIHCMR

Characteristic

Power Supply CurrentPower Supply CurrentOutput HIGH Voltage (Note 9)Output LOW Voltage (Note 9)Input HIGH Voltage (Single−Ended)Input LOW Voltage (Single−Ended)Input HIGH Voltage Common ModeRange (Differential Configuration)(Note 10)

Input HIGH CurrentInput LOW Current

0.5Min2326−1135−1935−1210−1935VEE + 2.0

Typ3034−1010−1810

Max4044−885−1685−885−16100.0

Min2326−1070−1870−1145−1870VEE + 2.0

25°CTyp3035−945−1745

Max4045−820−1620−820−15450.0

Min2328−1010−1810−1085−1810VEE + 2.0

85°CTyp3037−885−1685

Max4047−760−1560−760−14850.0

UnitmAmAmVmVmVmVV

IIHIIL

150

0.5

150

0.5

150mAmA

NOTE:Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limitvalues are applied individually under normal operating conditions and not valid simultaneously.

8.Input and output parameters vary 1:1 with VCC.9.All loading with 50 W to VCC − 2.0 V.

10.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differentialinput signal.

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MC10EP51, MC100EP51

Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 11)

−40°C

SymbolIEEVOHVOLVIHVILVIHCMRIIHIIL

Characteristic

Power Supply Current

Output HIGH Voltage (Note 12)Output LOW Voltage (Note 12)Input HIGH Voltage (Single−Ended)Input LOW Voltage (Single−Ended)Input HIGH Voltage Common Mode Range(Differential Configuration) (Note 13)Input HIGH CurrentInput LOW Current

0.5Min2621551355207513552.0

Typ3422801480

Max4424051605242016753.3150

0.5Min2621551355207513552.0

25°CTyp3522801480

Max4524051605242016753.3150

0.5Min2821551355207513552.0

85°CTyp3722801480

Max4724051605242016753.3150

UnitmAmVmVmVmVVmAmA

NOTE:Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limitvalues are applied individually under normal operating conditions and not valid simultaneously.

11.Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.12.All loading with 50 W to VCC − 2.0 V.

13.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differentialinput signal.

Table 9. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 14)

−40°C

SymbolIEEVOHVOLVIHVILVIHCMRIIHIIL

Characteristic

Power Supply Current

Output HIGH Voltage (Note 15)Output LOW Voltage (Note 15)Input HIGH Voltage (Single−Ended)Input LOW Voltage (Single−Ended)Input HIGH Voltage Common Mode Range(Differential Configuration) (Note 16)Input HIGH CurrentInput LOW Current

0.5Min2638553055377530552.0

Typ3439803180

Max4441053305412033755.0150

0.5Min2638553055377530552.0

25°CTyp3539803180

Max4541053305412033755.0150

0.5Min2838553055377530552.0

85°CTyp3739803180

Max4741053305412033755.0150

UnitmAmVmVmVmVVmAmA

NOTE:Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limitvalues are applied individually under normal operating conditions and not valid simultaneously.

14.Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.15.All loading with 50 W to VCC − 2.0 V.

16.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differentialinput signal.

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MC10EP51, MC100EP51

Table 10. 100EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 17)

−40°C

SymbolIEEVOHVOLVIHVILVIHCMR

Characteristic

Power Supply Current

Output HIGH Voltage (Note 18)Output LOW Voltage (Note 18)Input HIGH Voltage (Single−Ended)Input LOW Voltage (Single−Ended)Input HIGH Voltage Common ModeRange (Differential Configuration)(Note 19)

Input HIGH CurrentInput LOW Current

0.5Min26−1145−1945−1225−1945VEE + 2.0

Typ34−1020−1820

Max44−895−1695−880−16250.0

Min26−1145−1945−1225−1945VEE + 2.0

25°CTyp35−1020−1820

Max45−895−1695−880−16250.0

Min28−1145−1945−1225−1945VEE + 2.0

85°CTyp37−1020−1820

Max47−895−1695−880−16250.0

UnitmAmVmVmVmVV

IIHIIL

150

0.5

150

0.5

150mAmA

NOTE:Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limitvalues are applied individually under normal operating conditions and not valid simultaneously.

17.Input and output parameters vary 1:1 with VCC.18.All loading with 50 W to VCC − 2.0 V.

19.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differentialinput signal.

Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 20)

−40°C

SymbolfmaxtPLH,tPHL

Characteristic

Maximum Frequency (Figure 2)

Propagation Delay to Output DifferentialCLK, CLK to Q, Q10

100

RESET to Q, QtRRtStHtPWtJITTERtrtf

Reset RecoverySetup TimeHold Time

Minimum Pulse WidthRESET

Cycle−to−Cycle Jitter (Figure 2)Output Rise/Fall Times (20% − 80%)

Q, Q70250275300150100100500

440.2120

< 1170

80

Min

Typ> 3300340380

350425450

270300325150100100500

8040440.2130

< 1180

100

Max

Min

25°CTyp> 3320375400

370450475

300350350150100100500

440.2150

< 1200

Max

Min

85°CTyp> 3350425425

420500500

pspspspsps

Max

UnitGHzps

NOTE:Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limitvalues are applied individually under normal operating conditions and not valid simultaneously.

20.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.

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MC10EP51, MC100EP51

11001000900VOUTpp (mV)8007006005004003002001000

11

MeasuredSimulated10JITTEROUT ps (RMS)98765432

(JITTER)2000

3000

4000

5000

16000

01000

FREQUENCY (MHz)

Figure 2. Fmax/Jitter

QDriverDeviceQZo = 50 WDReceiverDeviceZo = 50 W50 W50 WDVTT

VTT = VCC − 2.0 V

Figure 3. Typical Termination for Output Driver and Device Evaluation(See Application Note AND8020/D − Termination of ECL Logic Devices.)

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MC10EP51, MC100EP51

ORDERING INFORMATION

Device

MC10EP51DMC10EP51DGMC10EP51DR2MC10EP51DR2GMC10EP51DTMC10EP51DTGMC10EP51DTR2MC10EP51DTR2GMC10EP51MNR4GMC100EP51DMC100EP51DGMC100EP51DR2MC100EP51DR2GMC100EP51DTMC100EP51DTGMC100EP51DTR2MC100EP51DTR2GMC100EP51MNR4G

PackageSOIC−8SOIC−8(Pb−Free)SOIC−8SOIC−8(Pb−Free)TSSOP−8TSSOP−8(Pb−Free)TSSOP−8TSSOP−8(Pb−Free)DFN8(Pb−Free)SOIC−8SOIC−8(Pb−Free)SOIC−8SOIC−8(Pb−Free)TSSOP−8TSSOP−8(Pb−Free)TSSOP−8TSSOP−8(Pb−Free)DFN8(Pb−Free)

Shipping†98 Units / Rail98 Units / Rail2500 / Tape & Reel2500 / Tape & Reel100 Units / Rail100 Units / Rail2500 / Tape & Reel2500 / Tape & Reel1000 / Tape & Reel98 Units / Rail98 Units / Rail2500 / Tape & Reel2500 / Tape & Reel100 Units / Rail100 Units / Rail2500 / Tape & Reel2500 / Tape & Reel1000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel PackagingSpecifications Brochure, BRD8011/D.

Resource Reference of Application Notes

AN1405/DAN1406/DAN1503/DAN1504/DAN1568/DAN1672/DAND8001/DAND8002/DAND8020/DAND8066/DAND8090/D

−ECL Clock Distribution Techniques−Designing with PECL (ECL at +5.0 V)−ECLinPSt I/O SPiCE Modeling Kit−Metastability and the ECLinPS Family−Interfacing Between LVDS and ECL−The ECL Translator Guide−Odd Number Counters Design−Marking and Date Codes

−Termination of ECL Logic Devices−Interfacing with ECLinPS

−AC Characteristics of ECL Devices

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MC10EP51, MC100EP51

PACKAGE DIMENSIONS

SOIC−8 NBCASE 751−07ISSUE AH

−X−A85B1S40.25 (0.010)MYM−Y−GKNOTES:

1.DIMENSIONING AND TOLERANCING PERANSI Y14.5M, 1982.

2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION A AND B DO NOT INCLUDEMOLD PROTRUSION.

4.MAXIMUM MOLD PROTRUSION 0.15 (0.006)PER SIDE.

5.DIMENSION D DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.127 (0.005) TOTALIN EXCESS OF THE D DIMENSION ATMAXIMUM MATERIAL CONDITION.

6.751−01 THRU 751−06 ARE OBSOLETE. NEWSTANDARD IS 751−07.

MILLIMETERSMINMAX4.805.003.804.001.351.750.330.511.27 BSC0.100.250.190.250.401.270 _8 _0.250.505.806.20INCHES

MINMAX0.1890.1970.1500.1570.0530.0690.0130.0200.050 BSC0.0040.0100.0070.0100.0160.0500 _8 _0.0100.0200.2280.244C−Z−HD0.25 (0.010)

MSEATINGPLANENX 45_0.10 (0.004)MJZY

SX

SDIMABCDGHJKMNSSOLDERING FOOTPRINT*

1.520.0607.00.2754.00.1550.60.0241.2700.050SCALE 6:1

mmǓǒinches*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering andMounting Techniques Reference Manual, SOLDERRM/D.

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MC10EP51, MC100EP51

PACKAGE DIMENSIONS

TSSOP−8DT SUFFIX

PLASTIC TSSOP PACKAGE

CASE 948R−02

ISSUE A

8x REFKNOTES:

1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.

2.CONTROLLING DIMENSION: MILLIMETER.

3.DIMENSION A DOES NOT INCLUDE MOLD FLASH.PROTRUSIONS OR GATE BURRS. MOLD FLASHOR GATE BURRS SHALL NOT EXCEED 0.15(0.006) PER SIDE.

4.DIMENSION B DOES NOT INCLUDE INTERLEADFLASH OR PROTRUSION. INTERLEAD FLASH ORPROTRUSION SHALL NOT EXCEED 0.25 (0.010)PER SIDE.

5.TERMINAL NUMBERS ARE SHOWN FORREFERENCE ONLY.

6.DIMENSION A AND B ARE TO BE DETERMINEDAT DATUM PLANE −W−.

MILLIMETERSMINMAX2.903.102.903.100.801.100.050.150.400.700.65 BSC0.250.404.90 BSC0 6 __INCHESMINMAX0.1140.1220.1140.1220.0310.0430.0020.0060.0160.0280.026 BSC0.0100.0160.193 BSC0 6 __0.15 (0.006)TUS2X0.10 (0.004)L/2815MTUSVSLPIN 1IDENT4B−U−0.25 (0.010)M0.15 (0.006)TUSA−V−FDETAIL EC0.10 (0.004)−T−SEATINGPLANEDGDETAIL E−W−DIMABCDFGKLMhttp://onsemi.com

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MC10EP51, MC100EP51

PACKAGE DIMENSIONS

DFN8

CASE 506AA−01

ISSUE D

1

DABPIN ONEREFERENCENOTES:1.DIMENSIONING AND TOLERANCING PERASME Y14.5M, 1994 .2.CONTROLLING DIMENSION: MILLIMETERS.3.DIMENSION b APPLIES TO PLATEDTERMINAL AND IS MEASURED BETWEEN0.25 AND 0.30 MM FROM TERMINAL.4.COPLANARITY APPLIES TO THE EXPOSEDPAD AS WELL AS THE TERMINALS.DIMAA1A3bDD2EE2eKLMILLIMETERSMINMAX0.801.000.000.050.20 REF0.200.302.00 BSC1.101.302.00 BSC0.700.900.50 BSC0.20−−−0.250.35E2 X0.10C2 X0.10CTOP VIEW0.10C8 X

A(A3)Ce18 X40.08CSEATINGPLANEA1SIDE VIEWD2e/2LE2K858 Xb0.10CAB0.05CNOTE 3ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further noticeto any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liabilityarising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. Alloperating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rightsnor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicationsintended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. ShouldBuyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or deathassociated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an EqualOpportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

BOTTOM VIEW

PUBLICATION ORDERING INFORMATION

LITERATURE FULFILLMENT:Literature Distribution Center for ON SemiconductorP.O. Box 5163, Denver, Colorado 80217 USAPhone: 303−675−2175 or 800−344−3860 Toll Free USA/CanadaFax: 303−675−2176 or 800−344−3867 Toll Free USA/CanadaEmail: orderlit@onsemi.comN. American Technical Support: 800−282−9855 Toll FreeUSA/CanadaEurope, Middle East and Africa Technical Support:Phone: 421 33 790 2910Japan Customer Focus CenterPhone: 81−3−5773−3850ON Semiconductor Website: www.onsemi.comOrder Literature: http://www.onsemi.com/orderlitFor additional information, please contact your localSales Representativehttp://onsemi.com11MC10EP51/D

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