P620-06QC资料

PLL620-05/-06/-07/-08/-09

Universal Low Phase Noise IC’s

Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)

FEATURES

• 100MHz to 200MHz Fundamental or 3rd

Overtone Crystal.

• Output range: 100 – 200MHz (no multiplication),

200 – 400MHz (2x multiplier), 400 – 700MHz (4x multiplier), or 800MHz-1GHz(PLL620-09 only, 8x multiplier).

• CMOS (Standard drive PLL620-07 or Selectable

Drive PLL620-06), PECL (Enable low PLL620-08 or Enable high PLL620-05) or LVDS output (PLL620-09).

• Supports 3.3V-Power Supply.

• Available in 16-Pin (TSSOP or 3x3mm QFN)

Note: PLL620-06 only available in 3x3mm. Note: PLL620-07 only available in TSSOP.

PIN CONFIGURATION

(Top View)

VDDXINXOUTSEL3^SEL2^OEGNDGND12345678161514131211109SEL0^SEL1^GNDCLKCVDDCLKTGNDGNDPLL 620-0xSEL0^10

DNC/DRIVSEL*DESCRIPTION

The PLL620-0x family of XO IC’s is specifically designed to work with high frequency fundamental and third overtone crystals. Their low jitter and low phase noise performance make them well suited for high frequency XO requirements. They achieve very low current into the crystal resulting in better overall stability.

XINXOUTSEL2^OE

13141516

12119

SEL1^VDD8765

GNDCLKCVDDCLKT

PLL620-0x

1

2

3

4

GNDGNDGNDBLOCK DIAGRAM SELOEPLL(PhaseLockedLoop)^: Internal pull-up

*: PLL620-06 pin 12 is output drive select (DRIVSEL) (0 for High Drive CMOS, 1 for Standard Drive CMOS)

The pin remains ‘Do Not Connect (DNC)’ for PLL620-05/07/08/09.

OUTPUT ENABLE LOGICAL LEVELS

Part #

OE

State

QQX+X-OscillatorAmplifierPLL620-08 PLL620-05 PLL620-06 PLL620-07 PLL620-09

0

Output enabled

(Default)

1 Tri-state 0 Tri-state 1 (Default)

Output enabled

PLL by-passOE input: Logical states defined by PECL levels for PLL620-08

Logical states defined by CMOS levels for PLL620-05/-06/-07/-09

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PLL620-05/-06/-07/-08/-09

Universal Low Phase Noise IC’s

Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)

PIN DESCRIPTIONS

Name VDD

TSSOP* Pin number 1, 12

3x3mm QFN* Pin number

6,11

Type Description P

+3.3V power supply.

XIN 2 13 I Crystal input. See Crystal Specification on page 3. XOUT 3 14 I Crystal output. See Crystal Specification on page 3. OE 6 16 I Output enable. GND 7,8,9, 10, 14 1,2,3,4,8 P Ground (except pin 12 on PLL620-06: DRIVSEL see below).

PLL620-06 only: Drive Select Input. This pin has an internal pull-up that will default DRIVSEL to ‘1’ when not connect to GND. CMOS output of PLL620-06 will be high drive CMOS

DRIVSEL** - 12 I when DRIVSEL is set to ‘0’, and will be standard CMOS otherwise. The pin remains ‘Do Not Connect (DNC)’ for PLL620-05/07/08/09.

True output PECL (PLL620-08) or LVDS (PLL620-09)

CLKT 11 5 O (N/C for PLL620-07)

Complementary output PECL (PLL620-08) or LVDS (PLL620-CLKC 13 7 O 09)

(CMOS out for PLL620-07).

SEL0 16 10 I SEL1 15 9 I Multiplier selector pins. These pins have an internal pull-up

that will default SEL to ‘1’ when not connected to GND. SEL2 5 15 I SEL3 4 Not available I * Note: PLL620-06 only available in 3x3mm QFN, PLL620-07 only available in TSSOP.

** Note: DRIVSEL on pin 12 on PLL620-06 only. The pin remains ‘Do Not Connect (DNC)’ for PLL620-05/07/08/09.

FREQUENCY SELECTION TABLE

SEL3 SEL2 SEL1 SEL0 0 1 1

0 0 1

1 1 1

1 1 0

Fin x 4 Fin x 2

Selected Multiplier

Fin x 8(PLL620-09 only)

1 1 1 1 No multiplication

Note: SEL3 is not available (always “1”) in 3x3mm package

All pins have internal pull-ups (default value is 1). Connect to GND to set to 0.

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PLL620-05/-06/-07/-08/-09

Universal Low Phase Noise IC’s

Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)

ELECTRICAL SPECIFICATIONS

1. Absolute Maximum Ratings

PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage

Input Voltage, dc Output Voltage, dc Storage Temperature

Ambient Operating Temperature* Junction Temperature

Lead Temperature (soldering, 10s) ESD Protection, Human Body Model

VDD 4.6 V VI -0.5 VDD+0.5 V VO -0.5 VDD+0.5 V TS -65 150 °C TA -40 85 °C TJ 125 °C 260 °C 2 kV

Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the

device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied.

* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.

2. Crystal Specifications

PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Crystal Resonator Frequency Crystal Loading Rating

Interelectrode Capacitance Recommended ESR

Fundamental or 3rd overtone*

CL (xtal) C0 RE AT cut FXIN

100 200 MHz 5

5 30

pF pF Ω

* Note: 3rd overtone crystals require an external resistor between XIN and XOUT to prevent the fundamental from oscillating.

3. General Electrical Specifications

PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Supply Current (Loaded

Outputs)

Operating Voltage Output Clock Duty Cycle Short Circuit Current

IDD VDD

PECL/LVDS/CMOS 100/80/40 mA

@ 50% VDD (CMOS) @ 1.25V (LVDS)

@ VDD – 1.3V (PECL)

2.97 3.63 V 45 50 55 45 50 55 % 45 50 55 mA ±50

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/01/05 Page 3

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PLL620-05/-06/-07/-08/-09

Universal Low Phase Noise IC’s

==Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)

4. Jitter Specifications

PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Period jitter RMS Period jitter peak-to-peak Accumulated jitter RMS Accumulated jitter peak-to-peak Random Jitter

Integrated jitter RMS at 155MHz Period jitter RMS Period jitter peak-to-peak Accumulated jitter RMS Accumulated jitter peak-to-peak Random Jitter

Integrated jitter RMS at 622MHz

At 155.52MHz, with capacitive decoupling between VDD and GND. Over 10,000 cycles

At 155.52MHz, with capacitive decoupling between VDD and GND. Over 1,000,000 cycles.

“RJ” measured on Wavecrest SIA 3000 Integrated 12 kHz to 20 MHz

At 622.08MHz, with capacitive decoupling between VDD and GND. Over 10,000 cycles

At 622.08MHz, with capacitive decoupling between VDD and GND. Over 1,000,000 cycles.

“RJ” measured on Wavecrest SIA 3000 Integrated 12 kHz to 20 MHz

2.5 2.5 2.5 0.3 11 11 3 1.6

0.4 1.8

18.5 20 24 27 ps ps ps ps ps ps ps ps

45 49 24 27

5. Phase Noise Specifications

PARAMETERS FREQUENCY @10Hz @100Hz @1kHz @10kHz @100kHz UNITS Phase Noise relative to carrier

155.52MHz -75 -95 -125 -140 -145 dBc/Hz

622.08MHz -75 -95 -110 -125 -120 6. CMOS Electrical Specifications

Output drive current

(High Drive) Output drive current (Standard Drive)

Output Clock Rise/Fall Time (Standard Drive)

Output Clock Rise/Fall Time (High Drive)

IOH IOL IOH IOL

PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS VOH= VDD-0.4V, VDD3.3V 30 VOL = 0.4V, VDD = 3.3V 30

VOH= VDD-0.4V, VDD3.3V 10 VOL = 0.4V, VDD = 3.3V 10 0.3V ~ 3.0V with 15 pF load 0.3V ~ 3.0V with 15 pF load

2.4 1.2

ns

mA mA

mA mA

* Note: High Drive CMOS is available on PLL620-06 through DRIVSEL selector input on pin 12.

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/01/05 Page 4

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PLL620-05/-06/-07/-08/-09

Universal Low Phase Noise IC’s

Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)

7. LVDS Electrical Characteristics

PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Output Differential Voltage VDD Magnitude Change Output High Voltage Output Low Voltage Offset Voltage

Offset Magnitude Change Power-off Leakage Output Short Circuit Current

VOD 247 355 454 mV ∆VOD

-50 50 mV VOH 1.4 1.6 V RL = 100 Ω

(see figure) VOL 0.9 1.1 V VOS 1.125 1.2 1.375 V ∆VOS

Vout = VDD or GND

VDD = 0V

IOSD IOXD

0 3 25 mV

±1

±10

uA mA -5.7 -8 8. LVDS Switching Characteristics

PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Differential Clock Rise Time Differential Clock Fall Time

LVDS Levels Test Circuittr tf

RL = 100 Ω

CL = 10 pF (see figure)

0.2 0.7 1.0 ns 0.2 0.7 1.0 ns LVDS Switching Test CircuitOUT

OUT50ΩCL = 10pFVODVOSVDIFFRL = 100Ω50ΩCL = 10pFOUTOUTLVDS Transistion Time WaveformOUT0V (Differential)OUT80%VDIFF20%0V80%20%tRtF47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/01/05 Page 5

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PLL620-05/-06/-07/-08/-09

Universal Low Phase Noise IC’s

Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)

9. PECL Electrical Characteristics

PARAMETERS SYMBOL CONDITIONS Output High Voltage Output Low Voltage

VOH VOL

RL = 50 Ω to (VDD – 2V)

(see figure)

MIN. MAX. UNITS VDD – 1.025

VDD – 1.620

V V

19. PECL Switching Characteristics

PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Clock Rise Time Clock Fall Time

tr tf

@20/80% - PECL @80/20% - PECL

0.6 0.5

1.5 1.5

ns ns

PECL Levels Test CircuitOUTVDDOUTPECL Output Skew50Ω2.0V50%50ΩOUTOUTtSKEWPECL Transistion Time WaveformDUTY CYCLE45 - 55%55 - 45%OUT80%50%20%OUTtRtF47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/01/05 Page 6

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PLL620-05/-06/-07/-08/-09

Universal Low Phase Noise IC’s

Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)

PACKAGE INFORMATION

16 PIN TSSOP ( mm )SymbolMin.Max.A-1.20A10.050.15B0.190.30 C0.090.20 D4.905.10E4.304.50H6.40BSCL0.450.75e0.65BSCEHDAA1eBCL 3mm x 3mm, QFN47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/01/05 Page 7

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PLL620-05/-06/-07/-08/-09

Universal Low Phase Noise IC’s

Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)

ORDERING INFORMATION

For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL620-0X X X X X NONE= TUBE PART NUMBER Order Number PLL620-05OC PLL620-05OC-R PLL620-05OCL PLL620-05OCL-R PLL620-05QC-R PLL620-05QCL PLL620-05QCL-R PLL620-06QC-R PLL620-06QCL PLL620-06QCL-R PLL620-07OC PLL620-07OC-R PLL620-07OCL PLL620-07OCL-R R=TAPE AND NONE=NORMAL PACKAGE L=GREEN PACKAGE PACKAGE TYPE X=SSOP TEMPERATURE C=COMMERCIAL I=INDUSTRIAL Marking P620-05OC P620-05OC P620-05OCL P620-05OCL P620-05QC P620-05QCL P620-05QCL P620-06QC P620-06QCL P620-06QCL P620-07OC P620-07OC P620-07OCL P620-07OCL Package Option TSSOP – Tube TSSOP – Tape & Reel TSSOP – Tube, GREEN TSSOP – Tape & Reel, GREEN QFN – Tape & Reel QFN – Tube, GREEN QFN – Tape & Reel, GREEN QFN – Tape & Reel QFN – Tube, GREEN QFN – Tape & Reel, GREEN TSSOP – Tube TSSOP – Tape & Reel TSSOP – Tube, GREEN TSSOP – Tape & Reel, GREEN Order Number PLL620-08OC PLL620-08OC-R PLL620-08OCL PLL620-08OCL-R PLL620-08QC-R PLL620-08QCL PLL620-08QCL-R PLL620-09OC PLL620-09OC-R PLL620-09OCL PLL620-09OCL-R PLL620-09QC-R PLL620-09QCL PLL620-09QCL-R Marking P620-08OC P620-08OC P620-08OCL P620-08OCL P620-08QC P620-08QCL P620-08QCL P620-09OC P620-09OC P620-09OCL P620-09OCL P620-09QC P620-09QCL P620-09QCL Package Option TSSOP – Tube TSSOP – Tape & Reel TSSOP – Tube, GREEN TSSOP – Tape & Reel, GREEN QFN – Tape & Reel QFN – Tube, GREEN QFN – Tape & Reel, GREEN TSSOP – Tube TSSOP – Tape & Reel TSSOP – Tube, GREEN TSSOP – Tape & Reel, GREEN QFN – Tape & Reel QFN – Tube, GREEN QFN – Tape & Reel, GREEN PLL620-05QC P620-05QC QFN – Tube PLL620-08QC P620-08QC QFN – Tube PLL620-06QC P620-06QC QFN – Tube PLL620-09QC P620-09QC QFN – Tube PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information

furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation.

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/01/05 Page 8